Patents

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PC Engine

4,924,744 - Apparatus for generating sound through low frequency and noise modulation

Media:Pat4924744.pdf

In an apparatus for generating sound, there are provided a plurality of channels for generating sounds. Each of the channels includes a memory for storing waveform data, and at least one of the channels includes a noise generator so that various kinds of sounds including rhythm sound-effects sound, effects sound-vibrato etc. are generated. There is further provided a controller by which voice sound signal is passed through the channels so that artificial sound, voice sound etc. are generated. There is still further provided a circuit for adjusting an amplitude level of a whole sound which is obtained by mixing output sounds of the channels so that far and near sound is produced. Further, each of the channels includes left and right attenuators which divide a channel sound into left and right channel sounds. Still further, the apparatus comprises a low frequency oscillator for controlling a depth of frequency modulation, and a controller for writing sampling data of a predetermined waveform into serial addresses of a memory.

4,951,038 - Apparatus for displaying a sprite on a screen

Media:Pat4951038.pdf

Apparatus for displaying a sprite on a screen comprises sprite attribute tables each including coordinates indicating a display position of a sprite, a pattern code defining the sprite in regard to pattern data, and control data defining a display mode of the sprite. A sprite generator is addressed in accordance with the pattern code to supply the pattern data of a sprite to a pattern data buffer. The sprite is displayed in accordance with the coordinates thereof on the screen. Therefore, the sprite is moved on the screen only by changing the coordinates of a corresponding sprite attribute table.

4,970,642 - An apparatus for accessing a memory

Media:Pat4970642.pdf

In an apparatus for controlling the access of a memory, a memory is accessed in accordance with a physical address composed of a predetermined number of bits larger than another predetermined number of which a logical address is composed. For the purpose, a logical address region is equally divided by the number of mapping registers from which one register is selected in accordance with a content of a logical address. A physical address region is divided to provide a plurality of blocks from which one block is selected in accordance with a content of the selected one register.

5,030,946 - Apparatus for the control of an access to a video memory

Media:Pat5030946.pdf

An apparatus for the control of an access to a video memory comprises a memory width register having a content of a number of dot periods by which an access timing is determined to address a video memory. Therefore, an access timing is easily controlled dependent on a memory speed of the video memory only by changing the content of the memory width register. When the video memory is accessed during a display cycle of the video memory, video data may be stored in a buffer memory, and transferred from the buffer memory after the display cycle is finished.

5,034,886 - Computer system for reducing number of dedicated registers using memory stock and sharing of address and general purpose registers

Media:Pat5034886.pdf

In a central processing unit, there are provided a address register for storing source and destination addresses and a count register for storing a length of a block data transfer. The address and count registers are wholly or partly composed of a wide use register having other functions. Therefore, the number of registers is minimized.

5,059,955 - Apparatus for producing video signals

Media: Pat5059955.pdf

In an apparatus for producing video signals in which a memory storing color data is addressed with an address signal determined by video data to produce color data, an analog RGB signal producing circuit in which the color data read from the memory are converted to analog signals is provided so that a color image can be displayed on a CRT or an exclusively used monitor means to which the color data are directly supplied. Further, a signal conversion circuit, a video color signal producing circuit and a composite circuit are provided wherein a luminance signal and color difference signals are produced in accordance with the color data in the signal conversion circuit, and the luminance signal is converted to an analog luminance signal and color carriers are produced by modulating analog signals converted from the color difference signals with the color subcarriers in the video color signal producing circuit. In the composite circuit, the analog luminance signal, the color carriers and a burst signal obtained in accordance with the color subcarriers are combined to produce a composite signal so that a color image can be displayed on a CRT to which the composite signal is supplied through a receiving circuit of a television set.

5,226,140 - Apparatus for controlling the transfer of data

Media:Pat5226140.pdf

An apparatus for controlling the transfer of data comprises registers for setting an address of a memory and data to be stored in the memory at the address, and a control unit for controlling the registers to set the address and data. In a case where an immediate data transfer command is produced, a physical address is defined by including the immediate data transfer command partly therein. The physical address thus defined is automatically set in the register for setting an address of a memory without receiving an address setting command so that the data stored in the register for setting data are written into the memory at the physical address.

5,319,786 - Apparatus for controlling a scanning type video display to be divided into plural display regions

Media:Pat5319786.pdf

An apparatus for controlling the access of a video memory comprises a group of registers in which various kinds of control data are set to access a video memory. The group of the registers are set to store data for detecting scanning rasters, incrementing or decrementing an address of the video memory which is accessed, and starting a DMA transfer of image data. Therefore, various kinds of accessing modes can be performed without the necessity of a complicated software.

PC-FX

5,459,485 - Image and sound processing apparatus

Media:Pat5459485.pdf

A RAM is accessed for each dot of an image to be displayed in accordance with a dot clock signal, and is accessed for each block in accordance with a system clock signal. These clock signals are selected to be used depending on the type of image data to be displayed in accordance with a microprogram.

5,467,442 - Image processing apparatus

Media:Pat5467442.pdf

In an image processing apparatus, a plurality of different images are displayed simultaneously on a display screen. According to a first feature, a priority circuit determines a display order of images for each dot, the images being supplied from a variety of image generators. In accordance with the priority order, the images are displayed on a screen. According to a second feature, an image processing apparatus includes a register for specifying a key area to be displayed as being transparent. A plurality of images are synthesized in accordance with the data held in the register. According to a third feature, a video display processor (VDP) processes color data of an image to be displayed, and a video encoder unit synthesizes a plurality of images in a predetermined order of a display priority by a cellophane function. The cellophane function is controlled to be turned on and off for each unit of a predetermined data block.

5,479,604 - Image processing apparatus which provides an indication of whether an odd or an even field is displayed

Media:Pat5479604.pdf

An ODD/EVEN signal, showing whether odd fields or even fields of the image are displayed on a screen, is supplied to each unit operating for data transmission. In accordance with the ODD/EVEN signal, a CPU monitors a current condition of the display image so that data transmission and processing, and use of a data bus, are controlled with exact timing. Consequently, each unit in the apparatus may operate effectively.

5,495,564 - Device for processing image data in a virtual screen area derived from a memory

Media:Pat5495564.pdf

A background image is composed of a plurality of background pictures to be superimposed on each other. Specific areas of the background pictures are displayed as a transparency so that the back side picture may be displayed through the transparent portion of the front side picture.

5,515,077 - Image processing system

Media:Pat5515077.pdf

Image data are defined by color vectors each composed of vector factors. Each vector factor specifies the brightness and color difference of a dot. The image data are transmitted with a normal timing when the vector factors correspond to dots of the image one for one, and are transmitted with another timing in another case to scroll the image horizontally.

5,530,873 - Method and apparatus for processing interruption

Media:Pat5530873.pdf

Shadow registers for processing interruption are provided in a CPU. When the control shifts to interruption routine, the shadow registers are used for the interruption routine by changing the use of ordinary registers thereto, and the ordinary registers are prohibited to be used during a period of the interruption. Subsequently to the finish of the interruption, the ordinary registers are re-used without the necessity of the store and the re-store of the ordinary registers.

5,548,655 - Sound processing apparatus

Media:Pat5548655.pdf

A sound processing apparatus has a volume control circuit for controlling sound volume and a register storing plural values specifying attenuation levels. The register values are determined to linearly correspond to the rate of change of the attenuation level.

5,548,696 - Image processing apparatus

Media:Pat5548696.pdf

A novel image processing apparatus allows sophisticated but simple image processing with respect to a plurality of input video data, for example, multi-stage data mixing or multiple semi-transparent process. In the image processing apparatus of the invention, a plurality of video data are processed by a predetermined time-sharing operation according to a priority sequence so as to be superposed one upon another. Transparency processing is also executed based on a transparency information bit included in input video data. The image processing apparatus includes data selectors 65 and 72 for selecting video data to be input, a priority sequence chromakey control circuit 96 for driving the data selectors 65 and 72 based on a predetermined priority sequence, a specific image process computing element 75 for executing a predetermined operation with respect to output data of the data selectors 65 and 72 and output data of a time-sharing data latch 74, a coefficient register 130 for determining coefficients used in the operation by the specific image process computing element 75, and a pixel image data latch 76 for finally holding output data of the specific image process computing element 75.

5,621,466 - Method and apparatus for compressing and decompressing image data using two dimensional orthogonal transform with improved compression rate

Media:Pat5621466.pdf

The compressed image data ZZ includes code data representing a quantization level coefficient QCx inserted between block data units. DCT coefficients QF(u,v) and a quantization level coefficient QCx, which are decoded form the compressed image data ZZ, are multiplied in the inverse quantization table generator 250 to generate a quantization table QT, and the inverse quantization unit 250 executes inverse quantization with the quantization table QT. Since the quantization level coefficient QCx is inserted between block data units in the compressed image data, the quantization table QT is renewed every time when a new quantization level coefficient QCx is decoded. The compressed image data also includes a special type of data, or null run data, representing a series of pixel blocks having an identical image pattern.

5,623,315 - Computer system for processing sound data

Media:Pat5623315.pdf

Sound data are transmitted to an ADPCM decoder in synchronization with a horizontal synchronizing signal, according to which image data are transmitted.

5,630,105 - Multimedia system for processing a variety of images together with sound

Media:Pat5630105.pdf

A high performance computer includes a CPU, a video display unit, a control unit, an image data extension unit, a video encoder unit responsive to the outputs of the video display unit, the controller unit and the image data extension unit, and a sound data output unit, for processing a variety of image data together with a variety of sound data at high speed. Three types of image data sequence processes can be carried out in the computer. These are an external block sequence, an external dot sequence, and an internal dot sequence.

5,692,099 - Computer system including recovery function of ADPCM sound data

Media:Pat5692099.pdf

A computer system having a storage, calculating portion, an ADPCM decoder, and recovery portion. The recovery portion calculates a recovery value based on control data and an initial scale value and replaces a reproduced value with the recovery value if a reproducing operation stops halfway through a sound data. Thus, the ADPCM decoder reproduces sound from the middle of the sound data.

5,694,518 - Computer system including ADPCM decoder being able to produce sound from middle

Media:Pat5694518.pdf

A computer system having a control unit, a storage, a first register for storing a scale value transmitted from the storage, a second register for storing ADPCM sound data transmitted from the storage, and an ADPCM decoder for reproducing sound in accordance with calculating the ADPCM sound data and the scale value and holding the ADPCM sound data and the scale value therein until next ADPCM sound data are transmitted thereto normally. The ADPCM decoder reproduces the sound from the middle of the ADPCM sound data by using the ADPCM sound data and scale value held therein.

5,758,185 - Method for resetting a system controlled by a CPU and having a semi-autonomous IC unit

Media:Pat5758185.pdf

In an information processing system including a CPU and peripheral IC apparatus, reset signals are supplied from the CPU to the peripheral IC apparatus, after the CPU is completely reset.

5,781,183 - Image processing apparatus including selecting function for displayed colors

Media:Pat5781183.pdf

Colors of plural pictures are defined by using color pallet data. Predetermined digital data are stored in a memory. The color pallet data are converted to the corresponding digital data stored in the memory. The memory contents are addressed by using an offset address (relative address) established for each picture.

5,801,776 - Image processing system

Media:Pat5801776.pdf

The present invention provides an image decoding and reconstruction system for successively reading out and decoding compression video data constituting one screen page and reconstructing an image with a memory of a small capacity. The system of the invention divides an image of one screen page into 8.times.8-pixel blocks, compresses video data by discrete cosine transform, successively reads data in the unit of a 2.times.2 matrix of the 8.times.8-pixel blocks, and stores the video data along horizontal scanning lines in one of two memories while reading other video data previously stored along the scanning lines out of the other memory. The invention also provides an interblock distortion removal filter for eliminating interblock distortions due to orthogonal transform. The filter eliminates interblock distortions generated on the boundary between vertically adjacent blocks in each 16-line data area before writing video data in the memory, and eliminates distortions between horizontally adjacent blocks in the data area when reading video data out of the memory. The filter also eliminates interblock distortions on the boundary between adjacent 16-line data areas by reading last line data of a first block out of one memory while reading first line data of a second block out of the other memory.

5,812,119 - Image processing system and method for formatting compressed image data

Media:Pat5812119.pdf

Image data are defined by color vectors each composed of vector factors. Each vector factor specifies the brightness and color difference of a dot. The image data are transmitted with a normal timing when the vector factors correspond to dots of the image one for one, and are transmitted with another timing in another case to scroll the image horizontally.
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